Andrew Boutros

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Andrew Boutros
PhD Student
Department of Electrical and Computer Engineering
University of Toronto
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Bio

I am a first year PhD student in the department of Electrical and Computer Engineering at the University of Toronto under the supervision of Prof. Vaughn Betz. My research interests include reconfigurable computing, FPGA architecture, and deep learning acceleration. I am also affiliated to the International Centre for Spatial Computational Learning. Before starting my PhD, I worked for a year as a research scientist at Intel Labs in Oregon, USA. I received my MASc in Computer Engineering from the University of Toronto in 2018, and my BSc in Electronics Engineering from the German University in Cairo in 2016.

Recent News

Oct 6, 2019: Our work on multi-FPGA neural machine translation acceleration was accepted for publication as a short paper in the 2019 International Conference on Field-Programmable Technology (FPT’19).
Sep 9, 2019: I started my PhD at the University of Toronto!
Apr 30, 2019: I presented our work on FPGA and ASIC integration for persistent RNNs at FCCM’19 in San Diego (Video).
Mar 3, 2019: Our work on FPGA and ASIC integration for persistent RNNs was accepted for publication as a full paper in the 2019 International Symposium on Field-Programmable Custom Computing Machines (FCCM’19).
Nov 15, 2018: Our work on FPGA logic blocks for low-precision deep learning was accepted for publication as a full paper in the 2019 International Symposium of Field-Programmable Gate Arrays (FPGA’19).
Nov 15, 2018: Our work on evaluating and enhancing Intel Stratix 10 FPGAs for persistent AI was accepted for a poster presentation in the 2019 International Symposium of Field-Programmable Gate Arrays (FPGA’19).
Aug 31, 2018: I presented a part of my MASc work in the International Conference of Field-Programmable Logic and Applications (FPL’18) and won the S. Vassiliadis Award Best Paper Award. This paper proposes an enhanced DSP block architecture for low-precision deep learning on FPGAs.
Aug 15, 2018: I started working as a research scientist at Intel Labs’ Accelerator Architecture Lab (AAL) in Oregon. I will be working with Dr. Eriko Nurvitadhi on next-generation FPGA architecture and efficient acceleration of AI workloads.
Aug 8, 2018: I successfully defended my MASc thesis titled “Enhancing FPGA Architecture for Efficient Deep Learning Inference”!